Global Unichip announces tape-out of UCIe 64G IP on TSMC N3P process, enabling higher bandwidth and lower latency for AI/HPC chiplets.
The tape-out of GUC's UCIe 64G IP on TSMC's N3P process is a significant advancement in chiplet interconnect technology. It enables higher bandwidth and lower latency, crucial for the performance demands of AI and HPC applications. This positions GUC as a key enabler for advanced packaging solutions, allowing for more complex and powerful chip designs by facilitating seamless integration of multiple dies.
GUC taped out its UCIe 64G IP.
The IP utilizes TSMC's N3P process technology.
This enables higher bandwidth and lower latency for AI/HPC applications.
This development is particularly relevant to the East Asian semiconductor ecosystem, with GUC based in Taiwan and TSMC being the world's leading foundry. The adoption of UCIe and advanced nodes like N3P by GUC supports the region's dominance in advanced chip manufacturing and design.
This enables higher bandwidth and lower latency for AI/HPC applications.
It supports advanced chiplet designs and packaging solutions.
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